Digital Verification Engineer, Crypto & Security

About the role

Verify digital hardware architectures and develop, review, and maintain verification plans while tracking progress. Create verification strategies, tests, and environments for security features and hardware co-processors, and introduce emerging methodologies into existing flows. Requires a BSc or MSc in Electronics or Electrical Engineering, experience developing SystemVerilog testbenches and using UVM, and practical knowledge of constrained-random and metrics-driven verification. Candidates should be able to write SVA, achieve coverage closure, analyze coverage, and debug complex simulations; formal verification knowledge is advantageous.